SANTA CLARA, CA — 06/22/09 — Tensilica,® Inc. today introduced a new family of high-performance communications DSP (digital signal processors) IP (intellectual property) cores — the ConnX DSP family — that include standard cores, click-box configurable options or a starting point for customized Xtensa® LX DPUs (dataplane processor units) for SOC (system-on-chip) designs.
SANTA CLARA, CA — 06/22/09 — Tensilica,® Inc. today introduced a new family of high-performance communications DSP (digital signal processors) IP (intellectual property) cores — the ConnX DSP family — that include standard cores, click-box configurable options or a starting point for customized Xtensa® LX DPUs (dataplane processor units) for SOC (system-on-chip) designs.
The newest member of the family, the ConnX Baseband Engine — see separate press release — provides industry leading computational throughput (sixteen 18-bit MACs per cycle) due to its application-specific instruction set optimized for compute-intensive LTE (Long-term Evolution) and 4G wireless base stations. Tensilica plans other ConnX family members for the low-power requirements of the handset market.